Neurosoc consortium


STMicroelectronics (ST-I) is the project coordinator and is one of the world’s largest semiconductor Companies.

ST-I provides the foundry access to PCM technology which is critical for the execution of NeuroSoC and a potentially strategic asset for positioning Europe ahead on edge-AI. ST-I also works on AI toolchain and compiler to support a wide range of MCU products in the STM32 family with the STM32CubeMX toolset AI plugin to map neural network algorithms from all of the popular deep learning toolchain and is widely used by thousands of industrials, academic and hobbyists around the world.

The company has a world class expertise on digital, analog, and mixed signal design and silicon process technology know-how. ST-I also has significant expertise in the design and exploitation of low-power accelerators for AI workloads.



STMicroelectronics Rousset SAS (ST-F) has the global responsibility of microcontrollers and secure solutions. These areas cover telecommunications, banking applications, e-identification but also the TPM modules and other circuitry for secure applications. ST-Rousset is hosting STMicroelectronics’ corporate security R&D within ST’s System Research and Applications (SRA) organization.

NeuroSoC will leverage its expertise in the field of hardware attacks and countermeasures on embedded cryptography and how these can be transposed in the context of embedded-AI processing.



University of Patras (UPAT) is one of the leading research and teaching institutions, and the third largest in Greece, constantly aiming for excellence through the creation, utilization, transfer, and application of knowledge.

Within NeuroSoC, UPAT contributes to the design of multi-tile IMNPU and on creating an FPGA-based NeuroSoC emulator.



ARCES Inter-Department Research Center of University of Bologna has been hosting the STMicroelectronics-University of Bologna joint lab since 2001 with the mission to find innovative solutions to complex problems based on advanced electronic technologies.

Currently, the research activity aims at emphasizing the potential of the STM smart-power process and devise new applications, focusing on the design of autonomous sensing and actuating IoT nodes and methods, architectures, and circuits for analog in-memory computing (AIMC) using embedded PCM.

In addition, UNIBO is also working on digital Systems-on-Chip for ultra-low-power Edge-AI. UNIBO will contribute to NeuroSoC in focusing on mixed-signal design of IMC tiles and IMNPU, to the design of the RISC-V based systems, with the exploration of RISC-V ISA extensions dedicated to flexible DNN acceleration, and with development of IMC-tailored DNN training and deployment.



Ubotica (UBO) is the result of the spin-out from H2020 project Eyes of Things (EoT) from Movidius after the company was acquired by Intel in 2016.

The extensive know-how on industrial and aerospace application of specialized HWwith AI acceleration for edge devices, combined with the algorithmic and application deployment in real-world situation would provide very useful to the execution and guidance to set requirements, develop application use-cases, and perform benchmarking on the NeuroSoC target.



Software Competence Center Hagenberg GmbH (SCCH) is an Austrian non-university research institution for data science and software science.

SCCH focuses on the whole life cycle of software and AI system engineering by addressing in particular (i) sustainability monitoring, (ii) AI modeling, (iii) system evolution, and (iv) audit and certification. A specific research focus of the participating Data Science department is on information fusion and deep learning.

Within NeuroSoC, SCCH will coordinate Algorithms & Software activities and substantially contribute to the development of AI tools targeting IMC for inference mapping as well as the development of training algorithms optimized for IMC.



Benkei (BNK) is an expert in maximizing the potential of collaborative projects, both in terms of management and Communication and Dissemination activities.

Benkei brings to NeuroSoC tools and methodologies to ensure that the project is on track in terms of project management Key Performance Indicators and leads part of activities dedicated to Communication and Dissemination, especially the internal and external communication.



The Leiden Institute of Advanced Computer Science (LIACS) at Leiden University (UL) is a center of excellence for multidisciplinary research and education in computer science, focused on several research fields including Systems and Security as well as Artificial Intelligence and Machine Learning.

LIACS’ mission is to improve current computer science methods, systems, and techniques, whilst exploring new research areas that are relevant to society.

UL will contribute to the analysis of physical security vulnerabilities and the design of countermeasures at the hardware architecture level and provide inputs for the architecture specification and design activities.



The group involved in NeuroSoC proposal (Department of Electrical, Computer and Biomedical Engineering) is active in the microelectronics field since some decades, with internationally recognized teams, addressing digital, analog, and mixed-signal integrated-circuit design for several applications including multilevel non-volatile memories (first Flash and then Phase Change Memories).

In particular a well-established cooperation is the one active with STMicroelectronics (more than 15 years) and, more recently, with the University of Bologna. In this respect, activities are actually focused on the design of analog and digital circuit for PCM.

Contributions will involve the design of analog circuits as voltage regulators, reference, and DC-DC power converters (especially fully integrated architectures based on charge pump structures).



Thales is a world leader for mission critical information systems, with activities in three core businesses: aerospace (with all major aircraft manufacturers as customers), defense, and security (including ground transportation solutions). It employs about 80,000 people worldwide distributed in 80 countries.

It provides its customers with all the key functions in the critical information loop, from detection and processing to transmission and distribution. THALES will participate in NeuroSoC by mainly designing a safe RISC-V-based MPSoC, as well as bringing a facial recognition use-case.

With their background on safe multicore architectures, and as a major player in Europe on RISC-V technologies through the OpenHW Group Thales participation in NeuroSoC will be of great value for the design of a safe and open MPSoC.



Robert Bosch GmbH (BOSCH) is one of the largest industrial companies in Germany, with a strong international orientation and around 405,000 employees worldwide. In close cooperation with vehicle manufacturers, Bosch is developing driver assistance systems to increase driving comfort and safety – the vision for accident-free driving.

Based on systems available today, the car should be able to ‘think ahead’ even more in the future and support the driver in the best possible way, especially in critical traffic situations.

The major contributions in NeuroSoC in Scalable NoC for Neuro-MPSoC targeting high-performance devices; Open-source RISC-V extension addressing AI workload; Object detection for autonomous driving.



IBM Research – Zurich (IBM) is one of the foremost research groups in the field of in-memory computing and in particular IMC based on phase-change memory. The Zurich team has been working on multi-level PCM for over a decade focusing on both the circuit/system-level aspects as well as device physics.

The team has also pioneered the computational applications of PCM devices for a range of applications from scientific computing to hyper-dimensional computing, in collaboration with ETHZ Zurich. Most recently, the team designed and fabricated a world’s first PCM-based in-memory compute core in 14nm CMOS technology.

Within NeuroSoC, IBM will mostly contribute to the characterization of analog PCM for computing, mixed-signal design of PCM-based IMC tiles and the design of IMNPU with multiple such tiles and algorithmic development to achieve software-equivalent accuracies using IMC.



The Swiss Federal Institute of Technology (ETHZ Zürich) is a science and technology university with an outstanding research record. ETHZ Zürich will be represented in NeuroSoC by two groups working closely together.

The Energy Efficient Circuits and IoT systems Group works on energy-efficient design of key circuit blocks for analog interfaces and data converters that will be needed for the PCM and SRAM-based IMC tiles.

The Digital Circuits and Systems Group will provide the know-how in energy-efficient heterogeneous systems based on RISC-V based open-source architecture which will allow the IMC tiles to be integrated with a capable digital processing system enhanced for data centric applications.

Both groups will be supported by the Microelectronics Design Center that provides design tool support for IC Design and vast experience accumulated as a result of more than 500 ASICs.



King’s College London (KCL) is a public research university located in London; United Kingdom that is ranked 35th in the world (Times Higher Education World Rankings 2020) with over £200 M annual research income. KCL will participate in NeuroSoc by designing the algorithmic methods and framework for mapping various neural network architectures into NeuroSoc hardware platforms.

It has developed deterministic and probabilistic frameworks for learning in spiking neural networks and has demonstrated how these and other deep learning algorithms can be implemented for on- chip learning and inference using nanoscale PCM devices in collaboration with IBM Research – Zurich.