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Dissemination & project results

Discover all the project results of the project!

Our public deliverables are available on Zenodo home

Publications

 

RedMule: A Mixed-Precision Matrix-Matrix Operation Engine for Flexible and Energy-Efficient On-Chip Linear Algebra and TinyML Training Acceleration

https://doi.org/10.48550/arXiv.2301.03904

Y. Tortorella, L. Bertaccini, L. Benini, D. Rossi, F. Conti

 

ITA: An Energy-Efficient Attention and Softmax

https://doi.org/10.48550/arXiv.2307.03493

G. Islamoglu, M. Scherer, G. Paulin, T. Fischer, V. J.B. Jung, A. Garofalo, L. Benini

 

Designing Circuits for AiMC Based on Non-Volatile Memories: a Tutorial Brief on Trade-offs and Strategies for ADCs and DACs Co-design

https://doi.org/10.1109/tcsii.2023.3340112

R. Vignali, R. Zurla, M. Pasotti, P. L. Rolandi, A. Singh, M. Le Gallo, A. Sebastian, T. Jang, A. Antolini, E. Franchi Scarselli, and A. Cabrini

 

Exploiting the State Dependency of Conductance Variations in Memristive Devices for Accurate In-Memory Computing

10.1109/TED.2023.3321014

A. Vasilopoulos, J. Buchel, B. Kersting, C. Lammie, K. Brew, S. Choi, T. Philip, N. Saulnier, V. Narayanan, M. Le Gallo, A. Sebastian

 

A Precision-Optimized Fixed-Point Near-Memory

https://doi.org/10.1109/ISCAS58744.2024.10558286

Elena Ferro, Athanasios Vasilopoulos, Corey Lammie, Manuel Le Gallo, Luca Benini, Irem Boybat, Abu Sebastian

 

Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2–8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing

https://doi.org/10.1109/JSSC.2023.3318301

Francesco Conti , Gianna Paulin , Angelo Garofalo, Davide Rossi , Alfio Di Mauro, Georg Rutishauser , Gianmarco Ottavi , Manuel Eggimann, Hayate Okuhara, and Luca Benini

 

A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks

https://doi.org/10.48550/arXiv.2307.01056

Alessandro Nadalini, Georg Rutishauser, Alessio Burrello, Nazareno Bruschi, Angelo Garofalo, Luca Benini, Francesco Conti, Davide Rossi

 

Spiking Neural Networks in the Alexiewicz Topology: A New Perspective on Analysis and Error Bounds

https://doi.org/10.48550/arXiv.2305.05772

Bernhard A. Moser, Michael Lunglmayr

 

Noise Adaptor in Spiking Neural Networks

https://doi.org/10.48550/arXiv.2312.05290

Chen Li, Bipin Rajendran

 

WIP: Automatic DNN Deployment on Heterogeneous Platforms: the GAP9 Case Study

https://doi.org/10.1145/3607889.3609092

Luka Macan; Alessio Burrello; Luca Benini; Francesco Conti

 

xTern: Energy-Efficient Ternary Neural Network Inference on RISC-V-Based Edge Systems

https://doi.org/10.48550/arXiv.2405.19065

Georg Rutishauser, Joan Mihali, Moritz Scherer, Luca Benini

 

Toward Attention-based TinyML: A Heterogeneous Accelerated Architecture and Automated Deployment Flow

https://doi.org/10.48550/arXiv.2408.02473

Philip Wiese, Gamze ˙Islamoglu ˘, Moritz Scherer, Luka Macan, Victor J.B. Jung, Alessio Burrello, Francesco Conti, Luca Benini

 

A Novel A-IMC Ge-GST ePCM Cell for Edge AI Applications on 28nm FD-SOI Platform

https://doi.org/10.5281/zenodo.18093806

M. Baldo, M. Allegra, M. Boniardi, L. Scotti, J. Jasse, R. Zurla, J. Bertolini, E. Calvetti, M. Pasotti, C. Boccaccio, L. Desvoivres, Y. Le-Friec,  A. Ostrovsky, P. Gouraud, S. Jeannot, L. Favennec, J. Luchtenveld, A. Vasilopoulos, V. Jonnalagadda, G. S. Syed, A. Sebastian, and A. Redaelli

 

Heterogeneous Embedded Neural Processing Units Utilizing PCM-based Analog In-Memory Computing

https://doi.org/10.5281/zenodo.18094670

I. Boybat, T. Boesch, M. Allegra, M. Baldo, J.J. Bertolini-Agnoletto, G. W. Burr, A. Buschini, A. Cabrini, E. Calvetti, C. Cappetta, F. Conti, E. Ferro, E. Franchi Scarselli, A. Garofalo, F. Girardi, G. Islamoglu, V. P. Jonnalagadda, G. Karunaratne, C. Lammie, M. Le Gallo, C. Li, R. Massa, A. C. Ornstein, H. Pang, M. Pasotti, B. Rajendran, A. Redaelli, I. Sanli, W. A. Simon, A. Singh, S.-P. Singh, G. Urlini, A. Vasilopoulos, R. Zurla, G. Desoli and A. Sebastian

 

Deeploy: Enabling Energy-Efficient Deployment of Small Language Models On Heterogeneous Microcontrollers

https://doi.org/10.48550/arXiv.2408.04413

Moritz Scherer, Luka Macan, Victor Jung, Philip Wiese, Luca Bompani, Alessio Burrello, Francesco Conti, Luca Benini

 

On Leaky-Integrate-And Fire As Spike-Train-Quantization Operator On Dirac-Superimposed Continuous-Time Signals

https://doi.org/10.48550/arXiv.2402.07954

Bernhard A. Moser, Michael Lunglmayr

 

Multi-Mode Borderguard Controllers for Efficient On-Chip Communication in Heterogeneous Digital/Analog Neural Processing Units

https://doi.org/10.5281/zenodo.18094955

Hong Pang; Carmine Cappetta; Riccardo Massa; Athanasios Vasilopoulos; Elena Ferro; Gamze Islamoglu

 

NIMA: Near In-Memory High-Precision Accumulation Unit for Heterogeneous Analog/Digital Deep Learning Acceleration

https://doi.org/10.5281/zenodo.18096165

Irem Sanli, Elena Ferro, Athanasios Vasilopoulos, Thomas Boesch, Abu Sebastian, Irem Boybat

 

A framework for analog-digital mixed-precision neural network training and inference

https://doi.org/10.5281/zenodo.18096270

Athanasios Vasilopoulos, Emma Boulharts, Corey Lammie, Julian Buchel, Hadjer Benmeziane, Manuel Le Gallo, Abu Sebastian

 

A Benchmark Methodology and Evaluation Framework For Edge Accelerators

https://doi.org/10.5281/zenodo.18096351

Maria Buckley, Iain Keaney, Fintan Buckley

 

A Distributed Emulation Environment for In-Memory Computing Systems

https://doi.org/10.48550/arXiv.2510.08257

Eleni Bougioukou, Anastasios Petropoulos, Nikolaos Toulgaridis, Theodoros Chatzimichail, Theodore Antonakopoulos

 

A Scalable FPGA Architecture With Adaptive Memory Utilization for GEMM-Based Operations

https://doi.org/10.48550/arXiv.2510.08137

Anastasios Petropoulos, Theodore Antonakopoulos

 

Efficient Deployment of CNN Models on Multiple In-Memory Computing Units

https://doi.org/10.48550/arXiv.2511.04682

Eleni Bougioukou, Theodore Antonakopoulos

 

MXDOTP: A RISC-V ISA Extension for Enabling Microscaling (MX) Floating-Point Dot Products

https://doi.org/10.48550/arXiv.2505.13159

Gamze Islamoglu, Luca Bertaccini, Arpan Suravi Prasad, Francesco Conti, Angelo Garofalo, Luca Benini

 

TraceFormer: A Transformer-Based Method for Weight Extraction from AIMC Tiles

https://doi.org/10.5281/zenodo.18096707

Roozbeh Siyadatzadeh, Fatemeh Mehrafrooz, Nele Mentens, Todor Stefanov

 

Heterogeneous neural processing units leveraging analog in-memory computing for edge AI

https://doi.org/10.5281/zenodo.18096883

Irem Boybat

 

In-Memory Computing-Based Embedded Neural Processing Units for AI

https://doi.org/10.5281/zenodo.18097501

Thomas Boesch

 

Leveraging Domain-Specialized RISC-V Multi-core Processors for Heterogeneous AI Acceleration at the Edge

https://doi.org/10.5281/zenodo.18097480

Angelo Garofalo

 

Area and Energy-Efficient Data Converters for Analog In-Memory Computing

https://doi.org/10.5281/zenodo.18097477

Taekwang Jang

 

Accuracy Simulation of Analog In-Memory Computing (AIMC) Accelerators

https://doi.org/10.5281/zenodo.18097454

Bipin Rajendran

 

Heterogeneous Analog In-Memory Computing Accelerators for AI

https://doi.org/10.5281/zenodo.18097421

Irem Boybat

 

Instruction-Based Coordination of Heterogeneous Processing Units for Acceleration of DNN Inference

https://doi.org/10.48550/arXiv.2511.15505

Anastasios Petropoulos, Theodore Antonakopoulos

 

Specialization meets Flexibility a Heterogeneous Architecture for High-Efficiency, High-flexibility ARVR Processing

https://doi.org/10.5281/zenodo.18097736

Arpan Suravi Prasad, Luca Benini, Francesco Conti

 

On the Sampling Sparsity of Neuromorphic Analog-to-Spike Conversion based on Leaky Integrate-and-Fire

https://doi.org/10.48550/arXiv.2410.17441

Bernhard A. Moser, Michael Lunglmayr

 

On the Solvability of the XOR Problem by Spiking Neural Networks

https://doi.org/10.48550/arXiv.2408.05845

Bernhard A. Moser, Michael Lunglmayr

Communication activities

NeuroSoC Kick Off press release – Link

NeuroSoC General Overview (October 22) – Link

NeuroSoC Poster (November 2023) – Link

NeuroSoC presentation at HIPEAC (January 24) – Link

NeuroSoC presentation at RISC-V SUMMIT (June 24) – Link

NeuroSoC presentation at HUAWEI MEMORY TECHNOLOGIES SUMMIT (June 24) – Link

NeuroSoC M12 status press release (March 24) – Link

NeuroSoC M18 Overview (February 24) – Link

NeuroSoC M30 Overview (September 25) – Link